access icon free Inter-coarse-grained reconfigurable architecture reconfiguration technique for efficient pipelining of kernel-stream on coarse-grained reconfigurable architecture-based multi-core architecture

Coarse-grained reconfigurable architecture (CGRA)-based multi-core architecture aims at achieving high performance by kernel-level parallelism (KLP). However, the existing CGRA-based multi-core architectures suffer from high energy consumption and performance bottleneck when trying to exploit the KLP because of poor resource utilisation caused by insufficient flexibility. In this study, the authors propose a new ring-based sharing fabric (RSF) to boost their flexibility level for the efficient resource utilisation focusing on the kernel-stream type of the KLP. In addition, they introduce a novel inter-CGRA reconfiguration technique for the efficient pipelining of kernel-stream based on the RSF. Experimental results show that the proposed approaches improve performance by up to 88.8% and reduce energy by up to 48.2% when compared with the conventional CGRA-based multi-core architectures.

Inspec keywords: power consumption; multiprocessing systems; reconfigurable architectures; pipeline processing

Other keywords: energy consumption; multicore architecture; ring-based sharing fabric; resource utilisation; kernel stream; efficient pipelining; kernel-level parallelism; inter-coarse-grained reconfigurable architecture; performance bottleneck

Subjects: Multiprocessing systems; Parallel architecture

References

    1. 1)
      • 25. WCET benchmarks’. Available at http://www.mrtc.mdh.se/projects/wcet/benchmarks.html, accessed April 2013.
    2. 2)
      • 16. Kang, J., Ko, Y., Lee, J., et al: ‘Selective validations for efficient protections on coarse-grained reconfigurable architectures’. Proc. IEEE Int. Conf. on Application-specific Systems, Architectures and Processors (ASAP), Washington, DC, USA, June 2013, pp. 9598.
    3. 3)
      • 2. Kim, Y., Mahapatra, R.N.: ‘Design of low power coarse-grained reconfigurable architecture’ (CRC Press, Taylor and Francis Group, London, 2010, 1st edn.).
    4. 4)
      • 13. Alnajiar, D., Ko, Y., Imagawa, T., et al: ‘Coarse-grained dynamically reconfigurable architecture with flexible reliability’. Proc. IEEE Int. Conf. on Field-Programmable Logic and Application (FPL), Prague, Czechoslovakia, August 2009, pp. 186192.
    5. 5)
      • 11. Jafri, S.M.A.H., Piestrak, S.J., Sentieys, O., et al: ‘Error recovery technique for coarse-grained reconfigurable architectures’. Proc. IEEE Int. Symp. on Design and Diagnostics of Electronic Circuits & Systems (DDECS), Tallinn, Estonia, April 2011, pp. 441446.
    6. 6)
    7. 7)
      • 12. Alnajjar, D., Ko, Y., Imagawa, T., et al: ‘A coarse-grained dynamically reconfigurable architecture enabling flexible reliability’. Proc. IEEE Workshop on Silicon Errors in Logic – System Effects (SELSE), Stanford, CA, USA, March 2009, pp. 15.
    8. 8)
    9. 9)
    10. 10)
      • 10. Jafri, S.M.A.H., Piestrak, S.J., Sentieys, O., et al: ‘Design of a fault-tolerant coarse-grained reconfigurable architecture: a case study’. Proc. 11th Int. Symp. on Quality Electronic Design (ISQED), San Jose, CA, USA, March 2010, pp. 845852.
    11. 11)
      • 15. Lee, G., Choi, K.: ‘Thermal-aware fault-tolerant system design with coarse-grained reconfigurable array architecture’. Proc. NASA/ESA Conf. on Adaptive Hardware and Systems (AHS), Anaheim, CA, USA, June 2010, pp. 272279.
    12. 12)
      • 3. Lee, D., Jo, M., Han, K., et al: ‘FloRA: coarse-grained reconfigurable architecture with floating-point operation capability’. Proc. Int. Conf. on Field-Programmable Technology, Sydney, Australia, December 2009, pp. 376379.
    13. 13)
    14. 14)
      • 1. Hartenstein, R.: ‘A decade of reconfigurable computing: a visionary retrospective’. Proc. Design Automation and Test in Europe Conf., Munich, Germany, March 2001, pp. 642649.
    15. 15)
      • 8. Nishihara, K., Hatabu, A., Moriyoshi, T.: ‘Parallelization of H.264 video decoder for embedded multicore processor’. Proc. IEEE Int. Conf. on Multimedia and Expo, Hannover, Germany, April 2008, pp. 329332.
    16. 16)
      • 22. ‘Synopsys–User guide’. Available at http://www.synopsys.com, accessed March 2013.
    17. 17)
      • 6. Wood, A., Knight, A., Ylvisaker, B., et al: ‘Multi-kernel floor planning for enhanced CGRAs’. Proc. IEEE Int. Conf. on Field-Programmable Logic and Application (FPL), Oslo, Norway, August 2012, pp. 157164.
    18. 18)
      • 7. Kim, M., Song, J.H., Kim, D.-H., et al: ‘Hybrid partitioned H.264 full high definition decoder on embedded quad-core’. Proc. IEEE Int. Conf. on Consumer Electronics (ICCE), Las Vegas, NV, USA, January 2012, pp. 279280.
    19. 19)
      • 17. Jin, S., Lee, S.-H., Chung, M.-K., et al: ‘Implementation of a volume rendering on coarse-grained reconfigurable multiprocessor’. Proc. IEEE Int. Conf. on Field-Programmable Technology (FPT), Seoul, South Korea, December 2012, pp. 243246.
    20. 20)
    21. 21)
      • 24. Livermore loop benchmarks’. Available at http://www.netlib.org/benchmark/livermorec, accessed March 2013.
    22. 22)
      • 19. Walters, K.H.G., Kokkeler, A.B.J., Gerez, S.H., et al: ‘Low-complexity hyperspectral image compression on a multi-tiled architecture’. Proc. IEEE NASA/ESA Conf. on Adaptive Hardware and Systems, San Francisco, CA, USA, July 2009, pp. 330335.
    23. 23)
      • 18. Basutkar, N., Yang, H., Xue, P., et al: ‘Software-defined DVB-T2 receiver using coarse-grained reconfigurable array processors’. Proc. IEEE Int. Conf. on Consumer Electronics (ICCE), Las Vegas, NV, USA, January 2013, pp. 580581.
    24. 24)
      • 9. Kim, M., Song, J., Kim, D., et al: ‘H.264 decoder on embedded dual core with dynamically load-balanced functional partitioning’. Proc. IEEE Int. Conf. on Image Processing (ICIP), Hong Kong, China, September 2010, pp. 37493752.
    25. 25)
      • 23. DSPstone’. Available at http://www.ice.rwth-aachen.de/research/tools-projects, accessed April 2013.
http://iet.metastore.ingenta.com/content/journals/10.1049/iet-cds.2015.0047
Loading

Related content

content/journals/10.1049/iet-cds.2015.0047
pub_keyword,iet_inspecKeyword,pub_concept
6
6
Loading