Three-state quantum dot gate field-effect transistor in silicon-on-insulator
- Author(s): Supriya Karmakar 1 ; Mukesh Gogna 2 ; Ernesto Suarez 3 ; Faquir C. Jain 4
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View affiliations
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Affiliations:
1:
Intel Corporation, Hillsboro, OR 97124, USA;
2: Global Foundries, Malta, NY, 12020, USA;
3: University of Hartford, West Hartford, CT, 06117, USA;
4: University of Connecticut, Storrs, CT, 06269, USA
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Affiliations:
1:
Intel Corporation, Hillsboro, OR 97124, USA;
- Source:
Volume 9, Issue 2,
March 2015,
p.
111 – 118
DOI: 10.1049/iet-cds.2014.0202 , Print ISSN 1751-858X, Online ISSN 1751-8598
© The Institution of Engineering and Technology
Received
07/02/2014,
Accepted
25/07/2014,
Published
20/03/2015
This paper presents the observation of intermediate state in the quantum dot gate field-effect transistors (QDGFETs) in silicon-on-insulator (SOI) substrate. Silicon dioxide (SiO2)-cladded silicon (Si) quantum dots (QDs) are site-specifically self-assembled on the top of SiO2 tunnel gate insulator on SOI substrates. Charge carrier tunnelling from the inversion channel to the QD layers on top of the gate insulator is responsible for the generation of intermediate state. Charge tunnelling is also verified by the C–V characteristics of the MOS device having same insulator structure as the gate region of the QDGFET. Considering the transfer of charge carriers from the inversion channel to two layers of SiO2-cladded Si QDs, a model based on self-consistent solution of Schrödinger and Poisson equations, is also presented, to explain the generation of intermediate state.
Inspec keywords: semiconductor quantum dots; MOSFET; silicon; elemental semiconductors; silicon compounds; silicon-on-insulator
Other keywords: silicon dioxide-cladded silicon quantum dots; quantum dot gate field-effect transistors; inversion channel; insulator structure; charge carriers; silicon-on-insulator substrate; gate insulator; SOI; Schrödinger equations; intermediate state generation; SiO2-Si; C-V characteristics; MOS device; tunnel gate insulator; Poisson equations; charge carrier tunnelling; QDGFETs
Subjects: Insulated gate field effect transistors
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