A CMOS variable gain amplifier (VGA) based on a novel linear and tunable triode transconductor is presented. The proposed transconductor employs local negative feedback for linearisation controlling the drain voltage of the input transistors biased in the triode region. The new design is able to operate at low supply voltage and the stability is guaranteed. The transconductor features a 47.75 dB dc gain and a 4.23 MHz unity gain frequency with a power consumption of only 91 µA. To show the feasibility of the proposed transconductor, a VGA has been fabricated. Measurement results for a 0.13 µm CMOS design show a −3 dB bandwidth above 2.8 MHz and a third-order harmonic distortion at 500 kHz below −46 dB over the whole gain range. The VGA exhibits a maximum power consumption of only 395 µW from a single 1.2 V supply.

References

1. 1)
  - 9. Bult, K., Geelen, G.J.G.M.: ‘The CMOS gain-boosting technique’, Analog Integr. Circuits Signal Process., 1991, 1, (2), pp. 119–135 (doi: 10.1007/BF00161305).
2. 2)
  - A. Zeki . Low-voltage CMOS triode transconductor with wide-range and linear tunability. Electron. Lett. , 20 , 1685 - 1686
3. 3)
  - L. Acosta , M. Jiménez , R. Carvajal , A. Lopez-Martin , J. Ramírez-Angulo . Highly linear tunable CMOS Gm-C low-pass filter. IEEE Trans. Circuits Syst. I , 10 , 2145 - 2158
4. 4)
  - 15. Alegre-Pérez, J.P., Calvo, B., Celma, S.: ‘A high-performance CMOS Feedforward AGC Circuit for a WLAN receiver’, IEEE Trans. Ind. Electron., 2010, 57, (8), pp. 2851–2857 (doi: 10.1109/TIE.2009.2036021).
5. 5)
  - 16. Faraji-Baghtash, H., Ayatollahi, A.: ‘A zero-pole reposition based, 0.95-mW, 68-dB, linear-in-dB, constant-bandwidth variable gain amplifier’, Analog Integr. Circuits Signal Process., 2014, 33, pp. 1353–1368 (doi: 10.1007/s00034-013-9705-1).
6. 6)
  - 17. Chen, Z., Zheng, Y., Chung-Choong, F., Je, M.: ‘A low-power variable-gain amplifier with improved linearity: analysis and design’, IEEE Trans. Circuits Syst. I: Regul. Pap., 2012, 59, (10), pp. 2176–2185 (doi: 10.1109/TCSI.2012.2185331).
7. 7)
  - P. Mak , S. U , R. Martins . On the design of a programmable-gain amplifier with built-in compact dc-offset cancellers for very low-voltage WLAN systems. IEEE Trans. Circuits Syst. I , 2 , 496 - 509
8. 8)
  - 6. Calvo, B., Celma, S., Sanz, M.T., Alegre, J.P., Aznar, F.: ‘Low-voltage linearly tunable CMOS transconductor with common-mode feedforward’, IEEE Trans. Circuits Syst. I: Regul. Pap., 2008, 55, (3), pp. 715–721 (doi: 10.1109/TCSI.2008.919746).
9. 9)
  - A. Thanachayanont , P. Naktongkul . Low-voltage wideband compact CMOS variable gain amplifier. Electron. Lett. , 2 , 51 - 52
10. 10)
  - 14. Kalentediris, V., Mountrichas, L., Vlassis, S., Siskos, S.: ‘A CMOS linear-in-dB VGA and agc loop for telecommunications applications’, Microelectron. J., 2013, 44, pp. 1063–1071 (doi: 10.1016/j.mejo.2012.11.005).
11. 11)
  - 13. Garcia-Alberdi, C., Aguado-Ruiz, J., Lopez-Martin, A.J., Ramirez-Angulo, J.: ‘Micropower class-AB VGA with gain-independent bandwidth’, IEEE Trans. Circuits Syst. II: Express Briefs, 2013, 60, (7), pp. 397–401 (doi: 10.1109/TCSII.2013.2258267).
12. 12)
  - 3. Kwon, K., Lee, K.: ‘A 23.4 mW 68 dB dynamic range low band CMOS hybrid tracking filter for ATSC digital TV tuner adopting RC and Gm-C topology’, IEEE Trans. Circuits Syst. I: Regul. Pap., 2011, 58, (10), pp. 2346–2354 (doi: 10.1109/TCSI.2011.2131290).
13. 13)
  - S.-C. Tsou , C.-F. Li , P.-C. Huang . A low power CMOS linear-in-decibel variable gain amplifier with programmable bandwidth and stable group delay. IEEE Trans. Circuits Syst. II , 1436 - 1440
14. 14)
  - A.A. Fayed , M. Ismail . A low-voltage, highly linear voltage-controlled transconductor. IEEE Trans. Circuits Syst. II, Express Briefs , 12 , 831 - 835
15. 15)
  - A. Torralba , R.G. Carvajal , J. Ramirez-Angulo , E. Munoz . Output stage for low supply voltage, high-perfomance CMOS current mirrors. Electron. Lett. , 24 , 1528 - 1529
16. 16)
  - 1. Chalvatzis, T., Gagnon, E., Repeta, M., Voinigescu, S.P.: ‘A low-noise 40-GS/s continuous-time bandpass ΔΣ ADC centered at 2 GHz for direct sampling receivers’, IEEE J. Solid-State Circuits, 2007, 42, (5), pp. 1065–1075 (doi: 10.1109/JSSC.2007.894794).
17. 17)
  - J-J. Sit , R. Sarpeshkar . A micropower logarithmic A/D with offset and temperature compensation. IEEE J. Solid-State Circuits , 2 , 308 - 319

Low-power CMOS variable gain amplifier based on a novel tunable transconductor

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