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A pair of complementary class-A buffers with voltage boosting method and improved frequency compensation is proposed. The buffer driving capabilities are enhanced by adding small auxiliary transistors to pull-up/pull-down the gate voltages of the buffer output transistors to improve the transient response. The auxiliary transistors are turned off for power saving in the steady-state operation. The proposed frequency compensation is more area-efficient than the Miller compensation method and hence maintains the high output voltage slew rate of the buffer. The measured static current of each buffer with the proposed circuits consumes 3 μA under a supply voltage of 5 V. The buffer settling times of the rising and the falling edges with a capacitance of 600 pF for an input swing of 5 V are 3.3 and 1.7 μs, respectively. The core size of the buffers including the compensation capacitance is 82 × 101 µm2 and the buffer can be stable when a load capacitance changes from 5 to 600 PF. Hence, the proposed output buffers concurrently achieve a fast response and are suitable for a wide range of load capacitances.
References
-
-
1)
-
10. Son, Y.S., Kim, J.H., Cho, H.H., et al: ‘A column driver with low-power area-efficient push-pull buffer amplifiers for active-matrix LCDs’. IEEE ISSCC Tech. Dig., 2007, pp. 142–143.
-
2)
-
6. Liu, P.J., Chen, Y.J.: ‘A CMOS current Interpolation DAC with gamma correction for LCD source driver’, IEEE Trans. Circuits Syst. Video Technol., 2012, 22, pp. 958–965 (doi: 10.1109/TCSVT.2012.2186742).
-
3)
-
13. Cherry, E.M.: ‘Universal basis for ranking small-signal aspects of compensation techniques for operational amplifiers’, Int. J. Circuit Theory Appl., 2011, 39, pp. 1105–1144 (doi: 10.1002/cta.689).
-
4)
-
1. Yu, P.C., Wu, J.C.: ‘A class-B output buffer for flat-panel-display column driver’, IEEE J. Solid-State Circuits, 1999, 34, pp. 116–119 (doi: 10.1109/4.782078).
-
5)
-
H. Nam ,
I. Kim ,
Y. Ahn ,
J. Roh
.
DC-DC switching converter with positive and negative outputs for active-matrix LCD bias.
IET Circuits, Devices Syst.
,
2 ,
138 -
146
-
6)
-
M.J. Bell
.
An LCD column driver using a switched capacitor DAC.
IEEE J. Solid-State Circuits
,
12 ,
2756 -
2765
-
7)
-
14. Razavi, B.: ‘Design of Analog CMOS integrated circuits’ (McGraw-Hill, New York, 2001, International edn.).
-
8)
-
T. Itakura ,
H. Minamizaki ,
T. Saito ,
T. Kuroda
.
A 402-output TFT-LCD driver IC with power-control based on the number of colors selected.
IEEE J. Solid-State Circuits
,
503 -
510
-
9)
-
11. Tsai, C.H., Wang, J.H., Zheng, H.Y., Chang, C.T., Wang, C.Y.: ‘A new compact low-offset push-pull output buffer with current positive feedback for a 10-bit LCD source driver’, IET Circuits Devices Syst., 2010, 4, pp. 539–547 (doi: 10.1049/iet-cds.2010.0119).
-
10)
-
C.W. Lu
.
High-speed driving scheme and compact high-speed low-power rail-to-rail class-B buffer amplifier for LCD applications.
IEEE J. Solid-State Circuits
,
1938 -
1947
-
11)
-
C.W. Lu ,
K. Hsu
.
A high-speed low-power rail-to-rail column driver for AMLCD application.
IEEE J. Solid-State Circuits
,
1313 -
1320
-
12)
-
18. Marano, D., Plumbo, G., Pennisi, S.: ‘A new compact low-power high-speed rail-to-rail class-b buffer for LCD applications’, IEEE J. Display Technol., 2010, 6, pp. 184–190 (doi: 10.1109/JDT.2010.2042566).
-
13)
-
B.K. Ahuja
.
An improved frequency compensation technique for CMOS operational amplifier.
IEEE J. Solid-State Circuits
,
6 ,
629 -
633
-
14)
-
16. Li, I.-Y., Kiang, J.F.: ‘Charge recycling method on pixel level’, IEEE J. Display Technol., 2008, 4, pp. 211–217 (doi: 10.1109/JDT.2007.901565).
-
15)
-
8. Itakura, T.: ‘A high slew rate operational amplifier for an LCD driver IC’, IEICE Trans. Fundam., 1995, E78-A, pp. 191–195.
-
16)
-
17. Fujimori-Chen, I., Muller, R., Fazio, W., Farrell, A., Whitney, D.: ‘A 10b 75 ns CMOS scanning-display-driver system for QVGA LCDs’. IEEE ISSCC Tech. Dig., 2008, pp. 172–604.
-
17)
-
4. Tai, Y.H.: ‘Design and Operation of TFT-LCD Panels’ (Wu-Nan Book, 2006).
-
18)
-
5. Lee, H.M., Son, Y.S., Jeon, Y.J., et al: ‘A 10 bit gray scale digital-to-analog converter with an interpolating buffer amplifier for AMLCD column drivers’. SID Symp. Dig., 2007, pp. 346–349.
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