High frequency CMOS amplifier with improved linearity
- Author(s): M. Tanseer Ali 1 ; Ruiheng Wu 1 ; Luhong Mao 2 ; Peter Callaghan 1 ; Predrag Rapajic 1
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View affiliations
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Affiliations:
1:
School of Engineering, University of Greenwich, Chatham Maritime, Kent ME4 4TB, UK;
2: School of Electronic Information Engineering, Tianjin University, Tianjin 300072, People's Republic of China
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Affiliations:
1:
School of Engineering, University of Greenwich, Chatham Maritime, Kent ME4 4TB, UK;
- Source:
Volume 8, Issue 6,
November 2014,
p.
450 – 458
DOI: 10.1049/iet-cds.2013.0327 , Print ISSN 1751-858X, Online ISSN 1751-8598
© The Institution of Engineering and Technology
Received
07/03/2013,
Accepted
22/01/2014,
Revised
17/01/2014,
Published
19/05/2014
In this paper, a novel amplifier linearisation technique based on the negative impedance compensation is presented. As demonstrated by using Volterra model, the proposed technique is suitable for linearising amplifiers with low open-loop gain, which is appropriate for RF/microwave applications. A single-chip CMOS amplifier has been designed using the proposed method, and the simulation results show that high gain accuracy (improved by 38%) and high linearity (IMD3 improved by 14 dB, OIP3 improved by 11 dB and adjacent channel power ratio (ACPR) improved by 44% for CDMA signal) can be achieved.
Inspec keywords: Volterra equations; MMIC amplifiers; UHF amplifiers; CMOS analogue integrated circuits; linearisation techniques
Other keywords: single-chip amplifier; high frequency CMOS amplifier; RF applications; linearity improvement; microwave applications; Volterra model; negative impedance compensation; amplifier linearisation technique; low open-loop gain
Subjects: Amplifiers; Microwave integrated circuits; CMOS integrated circuits
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