An Ldi/dt effect model in the float ground driver system of plasma display panel (PDP) is established. First, considering key parasitic parameters, this study analyses the Ldi/dt effect appeared in power supply and ground pins because of switching transition of float-ground integrated circuits. Second, a set of differential equations model is described and validated with a good agreement with experiments. Based on the model, time-domain transient voltages and frequency spectra of the Ldi/dt effect are simulated and analysed with different values of parameter elements. Finally, subject to system demand limitation and the proposed model, the manual parameter design for reducing the Ldi/dt effect is presented, and a PDP system is used to validate the proposed approach.

References

1. 1)
  - 9. Xiaoying, H., Shen, X., Weifeng, S., Shengli, L.: ‘Analysis of switching noise for an output driver circuit in an application’. Int. Conf. Electrical and Control Engineering, Yichang, China, 16–18 September 2011, pp. 4733–4736.
2. 2)
  - 2. Youchul, J., Junwoo, L., Jingook, K., Suna, C., Joungho, K.: ‘Radiated emission from plasma display panel (PDP) depending on addressing line structure and current driving scheme’. Proc. IEEE Int. Symp. Electromagnetic Compatibility, Minneapolis, MN, USA, August 2002, 10, (4), pp. 140–143.
3. 3)
  - 7. Nomiyama, T., Kawamura, K., Fukuchi, A., Sato, K., Shigeta, Y., Tada, G.: ‘New 256-ch PDP address driver IC with reducing switching noise’. Proc. 12th Int. Display Workshops/Asia Display, Takamatsu, Japan, December 2005, pp. 453–456.
4. 4)
  - 5. Yang, L., Yuan, J.S.: ‘Analyzing internal-switching induced simultaneous switching noise’. Proc. Fourth Int. Symp. Quality Electronic Design, Orlando, FL, USA, March 2003, pp. 410–415.
5. 5)
  - 10. Lee, J.-Y., Kim, Y.-S.: ‘Panel capacitance estimation method for three-electrode AC-PDP’, Electron. Lett., 2006, 42, (12), pp. 685–687 (doi: 10.1049/el:20060229).
6. 6)
  - 17. Senthinathan, R., Prince, J.L.: ‘Simultaneous switching ground noise calculation for packaged CMOS devices’, IEEE J. Solid-State Circuits, 1991, 26, (11), pp. 1724–1728 (doi: 10.1109/4.98995).
7. 7)
  - 11. Sang-Yoon, S., Myung-Jae, J., Bongkoo, K.: ‘Electrical equivalent circuit for ac plasma display panels’, IEEE Trans. Plasma Sci., 2007, 35, (5), pp. 1527–1532 (doi: 10.1109/TPS.2007.905107).
8. 8)
  - 8. Kim, Y., Park, S.: ‘The interlaced/progressive scan method to reduce the switching noise caused by data pulse in a plasma display’, Displays, 2007, 28, (3), pp. 105–111 (doi: 10.1016/j.displa.2007.04.002).
9. 9)
  - 12. Jayant Baliga, B.: ‘Fundamentals of power semiconductor devices’ (Springer Press, 2008), pp. 737.
10. 10)
  - 18. Amn, V., Birgir, T., Prince, J.L.: ‘Effect of CMOS driver loading conditions on simultaneous switching noise’, IEEE Trans. Compon. Packag. Manuf. Technol., B, 1994, 17, (4), pp. 480–485 (doi: 10.1109/96.338712).
11. 11)
  - 19. Tzong-Lin, W., Hao-Hsiang, C., Ting-Kuang, W.: ‘Overview of power integrity solutions on package and PCB: decoupling and EBG isolation’, IEEE Trans. Electromagn. Compat., 2010, 52, (2), pp. 346–356 (doi: 10.1109/TEMC.2009.2039575).
12. 12)
  - M. Jin , M. Weiming . Power converter EMI analysis including IGBT nonlinear switching transient model. IEEE Trans. Ind. Electr. , 5 , 1577 - 1583
13. 13)
  - 1. Mohammad, T., Kenneth, M.B.: ‘Power supply noise: a survey on effects and research’, IEEE Des. Test Comput., 2010, 27, (2), pp. 51–67 (doi: 10.1109/MDT.2010.52).
14. 14)
  - 16. Shen, X., Xia, L., Wei, S.: ‘Modelling of power metal-oxide semiconductor field-effect transistor for the analysis of switching characteristics in half-bridge converters’, IET Circuits Devices Syst., 2010, 4, pp. 327–336 (doi: 10.1049/iet-cds.2009.0275).
15. 15)
  - N. Idir , R. Bausiere , J.J. Franchaud . Active gate voltage control of turn-on di/dt and turn-off dv/dt in insulated gate transistors. IEEE Trans. Power Electron. , 849 - 855
16. 16)
  - 6. Yang, L., Yuan, J.S.: ‘Modelling and analysis of ground bounce due to internal gate switching’, IEE Proc. Circuits Devices Syst., 2004, 151, (4), pp. 300–306 (doi: 10.1049/ip-cds:20040190).
17. 17)
  - 13. Li, D., Pinaki, M.: ‘Simultaneous switching noise analysis using application specific device modelling’, IEEE Trans. VLSI Syst., 2003, 12, pp. 1146–1152.
18. 18)
  - K.T. Tang , E.G. Friedman . Simultaneous switching noise in on-chip CMOS power distribution networks. IEEE Trans. Very Large Scale Integr. (VLSI) Syst. , 4 , 487 - 493
19. 19)
  - 4. Yang, L., Yuan, J.S., Hagedorn, M.: ‘Analyzing the simultaneous switching noise due to internal gate switching’. Proc. 45th Midwest Symp. Circuits and Systems, Orlando, FL, USA, August 2002, pp. 368–371.

Modelling of Ldi/dt effect with frequency spectrum analysis and parameter design in float ground driver system

References

Related content