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access icon free Real-time optical character recognition on field programmable gate array for automatic number plate recognition system

  • Author(s): Xiaojun Zhai 1, 2 ; Faycal Bensaali 1, 3 ; Reza Sotudeh 1
    • View affiliations
    • Affiliations: 1: School of Engineering & Technology, University of Hertfordshire, Hatfield, UK;
      2: School of Computer Science and Electronic Engineering, University of Essex, Colchester, UK;
      3: Department of Electrical Engineering, College of Engineering, Qatar University, Doha, Qatar
  • Source: Volume 7, Issue 6, November 2013, p. 337 – 344
    DOI:  10.1049/iet-cds.2012.0339 , Print ISSN 1751-858X, Online ISSN 1751-8598
© The Institution of Engineering and Technology
Received 09/11/2012, Accepted 07/06/2013, Revised 03/06/2013, Published

The last main stage in an automatic number plate recognition system (ANPRs) is optical character recognition (OCR), where the number plate characters on the number plate image are converted into encoded texts. In this study, an artificial neural network-based OCR algorithm for ANPR application and its efficient architecture are presented. The proposed architecture has been successfully implemented and tested using the Mentor Graphics RC240 field programmable gate arrays (FPGA) development board equipped with a 4M Gates Xilinx Virtex-4 LX40. A database of 3570 UK binary character images have been used for testing the performance of the proposed architecture. Results achieved have shown that the proposed architecture can meet the real-time requirement of an ANPR system and can process a character image in 0.7 ms with 97.3% successful character recognition rate and consumes only 23% of the available area in the used FPGA.

Inspec keywords: optical character recognition; neural nets; field programmable gate arrays

Other keywords: real-time optical character recognition; 4M Gates Xilinx Virtex-4 LX40; automatic number plate recognition system; number plate characters; artificial neural network-based OCR algorithm; Mentor Graphics RC240 FPGA development board; time 0.7 ms; ANPR application; number plate image; UK binary character images; field programmable gate array

Subjects: Neural computing techniques; Computer vision and image processing techniques; Logic circuits; Image recognition; Logic and switching circuits

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