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Using RTL-to-C++ translation for large SoC concurrent engineering: a case study

Using RTL-to-C++ translation for large SoC concurrent engineering: a case study

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RTL-to-C translation can be used to help verify the design of complex SoCs by letting generated models run production code at high speed. The authors describe the technique used to replace hardware emulation during the development of a 5 million gate device for the DSL market.

Inspec keywords: concurrent engineering; system-on-chip; circuit CAD; high level synthesis; microprocessor chips; digital subscriber lines; C++ language; integrated circuit design

Other keywords: production code; SoC; flexible communications processor; hardware emulation; RTL-to-C++ translation; DSL; multiple CPU cores; concurrent engineering

Subjects: Microprocessor chips; Microprocessors and microcomputers; Computer-aided circuit analysis and design; Digital circuit design, modelling and testing; Computer-aided logic design; Semiconductor integrated circuit design, layout, modelling and testing; Electronic engineering computing

http://iet.metastore.ingenta.com/content/journals/10.1049/ess_20030104
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