Non-quasi-static model for MOSFET based on carrier-transit delay
Non-quasi-static model for MOSFET based on carrier-transit delay
- Author(s): N. Nakayama ; D. Navarro ; M. Tanaka ; H. Ueno ; M. Miura-Mattausch ; H.J. Mattausch ; T. Ohguro ; S. Kumashiro ; M. Taguchi ; T. Kage ; S. Miyamoto
- DOI: 10.1049/el:20040054
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- Author(s): N. Nakayama 1 ; D. Navarro 1 ; M. Tanaka 1 ; H. Ueno 1 ; M. Miura-Mattausch 1 ; H.J. Mattausch 1 ; T. Ohguro 2 ; S. Kumashiro 2 ; M. Taguchi 2 ; T. Kage 2 ; S. Miyamoto 2
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View affiliations
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Affiliations:
1: Graduate School of Advanced Sciences of Matter, Hiroshima University, Higashi-Hiroshima, Japan
2: Graduate School of Advanced Sciences of Matter, Semiconductor Technology Academic Research Center (STARC), Kanagawa, Japan
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Affiliations:
1: Graduate School of Advanced Sciences of Matter, Hiroshima University, Higashi-Hiroshima, Japan
- Source:
Volume 40, Issue 4,
19 February 2004,
p.
276 – 278
DOI: 10.1049/el:20040054 , Print ISSN 0013-5194, Online ISSN 1350-911X
A non-quasi-static MOSFET model for circuit simulation, which is based on the carrier-transit delay responsible for the channel formation during switching on, has been developed. The developed model was implemented into a circuit simulator, and good agreement of transient drain current with 2D simulation results was confirmed.
Inspec keywords: semiconductor device models; digital simulation; switching; carrier density; circuit simulation; carrier mobility; MOSFET
Other keywords:
Subjects: Computer-aided circuit analysis and design; Insulated gate field effect transistors; Semiconductor device modelling, equivalent circuits, design and testing
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