An integrated space-time equaliser is proposed for direct sequence code division multiple access (DS/CDMA) receivers. A significant reduction in mean square error over that possible with the previous equalisers cascaded space-time reduced-length receiver is obtained with the integrated architecture. In addition, the use of unequal reduced lengths between array elements can significantly reduce the complexity without significantly reducing the performance.
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content/journals/10.1049/el_19990022
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