Measurement of PLL phase error caused by power supply noise
Measurement of PLL phase error caused by power supply noise
- Author(s): K.A. Jenkins and J.P. Eckhardt
- DOI: 10.1049/el:19981334
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- Author(s): K.A. Jenkins 1 and J.P. Eckhardt 2
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View affiliations
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Affiliations:
1: T.J. Watson Research Center, IBM, Yorktown Heights, USA
2: System 390 Division, IBM, Poughkeepsie, USA
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Affiliations:
1: T.J. Watson Research Center, IBM, Yorktown Heights, USA
- Source:
Volume 34, Issue 20,
1 October 1998,
p.
1907 – 1908
DOI: 10.1049/el:19981334 , Print ISSN 0013-5194, Online ISSN 1350-911X
The measurement of the accumulated phase error of phase-locked loops (PLLs) in microprocessor systems is discussed. A system which creates controlled power supply noise and measures the PLL response is described. Examples of the use of this technique are shown for a PLL used in a 400 MHz microprocessor.
Inspec keywords: circuit testing; noise generators; phase locked loops; phase measurement; microcomputers; circuit noise; errors
Other keywords:
Subjects: Microprocessors and microcomputers; Phase and gain measurement; Modulators, demodulators, discriminators and mixers
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