Suppression of drain-current overshoot in SOI-MOSFETs using an ultrathin SOI substrate

Suppression of drain-current overshoot in SOI-MOSFETs using an ultrathin SOI substrate

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An n-channel SOI-MOSFET fabricated on a very thin (500 Å) SOI substrate exhibited no detectable drain-current overshoot for various gate turn-on pulses. The reason can be ascribed to the suppression of the floating substrate effect, brought about by the quick decay of excess holes.


    1. 1)
      • K. Kato , K. Taniguchi . Numerical analysis of switching characteristics of SOIMOSFET's. IEEE Trans.
    2. 2)
      • Yoshimi, M., Wada, T., Kato, K., Tango, H.: `High performance SOIMOSFET using ultra-thin SOI film', Tech. dig. IEDM, 1987, p. 640.
    3. 3)
      • J.P. Colinge . Reduction of floating substrate effect in thin-film SOI MOSFETs. Electron. Lett. , 187 - 188
    4. 4)
      • J.P. Colinge . Subthreshold slope of thin-film SOI MOSFETs. IEEE Electron Dev. Lett.
    5. 5)
      • Hamasaki, T., Inoue, T., Higashinakagawa, I., Yoshii, T., Kashiwagi, M., Tango, H.: `Amplitude modulated pseudo-line electron beam recrystallization for large area SOI growth', Extended abstracts of 17th conf. on solid state devices and materials, 1985, Tokyo, p. 135.

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