© The Institution of Electrical Engineers
Recent letters have described two multiplier arrays. It is now proposed that these arrays are more versatile than was formerly supposed. They can be used both as multipliers and as adders, either separetely or together, giving a parallel binary output.
Inspec keywords:
logic circuits
Subjects:
Logic circuits
References
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1)
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J.C. Hoffmann ,
B. Lacaze ,
J. Csillag
.
Multiplieur parallèle à circuits logiques itératifs.
Electronics Letters
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2)
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D.P. Burton ,
D.R. Noaks
.
High-speed iterative multiplier.
Electronics Letters
http://iet.metastore.ingenta.com/content/journals/10.1049/el_19680260
Related content
content/journals/10.1049/el_19680260
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