Your browser does not support JavaScript!
http://iet.metastore.ingenta.com
1887

access icon free Compact CMOS LiT VCO achieving 198.6 dBc/Hz FoMA

A compact CMOS linear transconductance (LiT) voltage-controlled oscillator (VCO) in 65 nm CMOS process is presented. The proposed LiT technique is realised using NP core without a choke inductor to reduce die area and avoid dual resonance problem. The measured output frequency of the proposed VCO shows 11.18–11.98 GHz and phase noise is −112.62 dBc/Hz at 1 MHz offset frequency. DC power consumption of the VCO core and the buffer is 5.86 and 6 mW, respectively. It achieves a high figure of merit normalised to the area of 198.6 dBc/Hz.

References

    1. 1)
    2. 2)
      • 4. Ji, Y., Nan, L., Mouthaan, K.: ‘Analysis of the drain thermal noise for deep submicron MOSFETs’. Asia Pacific Microwave Conf., Singapore, December 2009, pp. 16591662, doi: 10.1109/APMC.2009.5384327.
    3. 3)
      • 2. Wachi, Y., Nagasku, P., Kondoh, H.: ‘A 28 GHz low-phase-noise CMOS VCO using an amplitude-redistribution technique’. IEEE Int. Solid-State Circuits Conf., San Francisco, CA, USA, February 2008, pp. 482483, doi: 10.1109/ISSCC.2008.4523267.
    4. 4)
    5. 5)
http://iet.metastore.ingenta.com/content/journals/10.1049/el.2017.4047
Loading

Related content

content/journals/10.1049/el.2017.4047
pub_keyword,iet_inspecKeyword,pub_concept
6
6
Loading
This is a required field
Please enter a valid email address