access icon free Breakdown and optical response of CMOS perimeter gated single-photon avalanche diodes

The breakdown and optical response of perimeter gated single-photon avalanche diodes fabricated in a standard 0.5 μm 2-poly 3-metal CMOS process is presented. These diodes prevent premature edge breakdown through the addition of a polysilicon gate. The fabricated devices feature varying size, shape (square, octagonal, and circular), and junction types (nwell-p+ and psub-nwell) with a perimeter gate located on top of the junction. Voltage applied to the gate modulates the electric field and its effect on the breakdown voltage and optical response is discussed. Experimental results are supported by physical device simulations where applicable.

Inspec keywords: avalanche breakdown; CMOS integrated circuits; integrated optoelectronics; avalanche photodiodes

Other keywords: size 0.5 mum; optical response; polysilicon gate; breakdown voltage; electric field; premature edge breakdown; standard 2-poly 3-metal CMOS process; physical device simulations; CMOS perimeter gated single-photon avalanche diodes

Subjects: Dielectric breakdown and discharges; Photoelectric devices; CMOS integrated circuits; Integrated optoelectronics

References

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      • 4. Wu, J., Lin, S.: ‘Simulation of electric field distribution in CMOS single photon avalanche diodes at breakdown voltage’. Int. Conf. Optical MEMS and Nanophotonics, Glasgow, UK, August 2014, pp. 187188.
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http://iet.metastore.ingenta.com/content/journals/10.1049/el.2017.2485
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