© The Institution of Engineering and Technology
A method for the implementation of the atan2 operator based on the coordinate rotation digital computer algorithm is described. In the proposal, the computation of the z-path takes advantage of the look-up table-based FPGA resources to reduce by between 17 and 25%, without performance deterioration, the overall area of the unrolled architecture.
References
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1)
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1. Meher, P.K., Valls, J., Juang, T.B., Sridharan, K., Maharatna, K.: ‘50 years of CORDIC: algorithms, architectures, and applications’, IEEE Trans. Circuits Syst. I, 2009, 56, (9), pp. 1893–1907 (doi: 10.1109/TCSI.2009.2025803).
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2. de Dinechin, F., Istoan, M.: ‘Hardware implementations of fixed-point atan2’. 22nd Symp. Computer Arithmetic, Lyon, France, June 2015, pp. 34–40, .
http://iet.metastore.ingenta.com/content/journals/10.1049/el.2017.2090
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