In this Letter a new compensation strategy for a class of three-stage operational transconductance amplifiers is proposed. The proposed approach reduces the original third-order transfer function of the loop gain to that of a pure two-pole amplifier thus allowing the designer to use well-known and consolidated design rules. The approach, suitable for high-speed switched-capacitor circuits, is validated by means of intensive Monte Carlo simulations on a 65-nm three-stage CMOS amplifier.