access icon free Energy-efficient successive-approximation-register based capacitive interface for pressure sensors

A novel energy-efficient 8 bit 2.78 kS/s capacitance-to-digital converter (CDC) interface for capacitive pressure sensors is presented. A new direct-capacitance-comparison technique (DCCT) is proposed and employed together with a successive approximation register (SAR) algorithm to resolve the sensor capacitance by, directly, comparing it with an on-chip binary-weighted capacitive digital-to-analogue converter (DAC) array. An offset DAC array compensates for the sensor rest and parasitic capacitances, accordingly, the interface gives a dynamically zoomed digital-output code that corresponds only to the sensor capacitance change. The full-scale input capacitance of the CDC is easily adjustable to interface to a wide range of sensors. The proposed 8 bit SAR-based CDC is designed and simulated using 0.18 μm standard CMOS technology. The CDC exhibits a capacitance sensing range from 4 to 6 pF, provides a resolution and linearity of 7.26 and 8.2 bit, respectively. It achieves a figure-of-merit of 1.8 pJ/step at 1.4 V supply and 36 μs conversion time. Compared with the state-of-the-art implementations with similar performance.

Inspec keywords: pressure sensors; integrated circuit design; CMOS integrated circuits; capacitive sensors; capacitance measurement; digital-analogue conversion

Other keywords: size 0.18 mum; capacitance-to-digital converter interface; word length 8.2 bit; word length 8 bit; CMOS technology; energy-efficient successive approximation register; capacitive pressure sensor; CDC interface; onchip binary-weighted capacitive digital-to-analogue converter array; voltage 1.4 V; word length 7.26 bit; direct-capacitance-comparison technique; offset DAC array; time 36 mus; power 7.7 muW; full-scale input parasitic capacitance; successive approximation register algorithm; capacitance 4 pF to 6 pF; SAR algorithm

Subjects: A/D and D/A convertors; Pressure and vacuum measurement; Sensing devices and transducers; Impedance and admittance measurement; Semiconductor integrated circuit design, layout, modelling and testing; CMOS integrated circuits

References

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http://iet.metastore.ingenta.com/content/journals/10.1049/el.2015.2435
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