access icon free Area- and power-efficient DC–DC converter with on-chip compensation

A dual-path capacitor multiplier (DPCM) technique is proposed for on-chip frequency compensation. The DPCM uses two currents to charge and discharge a compensation capacitor concurrently. Consequently, the equivalent capacitance is amplified dramatically with slight increase in silicon area and power. Thanks to the DPCM, the transient response of the DC–DC converter has improved significantly because of the small compensation capacitor. Experimental results demonstrate converter stability and transient response. The transient recovery time of a 450 mA step load change is <30 μs. With the proposed technique, the compensation capacitor is shrunk significantly and adding the compensation resistor would have helped in improving transient response.

Inspec keywords: DC-DC power convertors; silicon; transient response; elemental semiconductors; capacitors; compensation; circuit stability; resistors; multiplying circuits

Other keywords: compensation resistor; stability; current 450 mA; area-efficient DC-DC converter; Si; transient response; dual-path capacitor multiplier technique; DPCM technique; compensation capacitor; power-efficient DC-DC converter; on-chip frequency compensation; equivalent capacitance

Subjects: Logic circuits; Capacitors; Power electronics, supply and supervisory circuits; Resistors

References

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      • 1. Chang, J.S., Oh, H.S., Jun, Y.H., Kong, B.S.: ‘Fast output voltage-regulated PWM buck converter with an adaptive ramp amplitude control’, IEEE Trans. Circuits Syst. II, Express Briefs, 2013, 60, (10), pp. 591595.
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http://iet.metastore.ingenta.com/content/journals/10.1049/el.2014.0459
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