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access icon free Two-step continuous-time incremental sigma–delta ADC

© The Institution of Engineering and Technology
Received 30/03/2013, Published

A two-step continuous-time (CT) incremental sigma–delta (IΣΔ) ADC, which enhances the performance of conventional CT IΣΔ ADCs, is proposed. By pipelining two second-order CT IΣΔ ADCs, the proposed two-step architecture can achieve high resolution without sacrificing the conversion rate. Compared to other alternatives, the two-step CT IΣΔ ADC exhibits the freedom of adjusting its accuracy and speed independently while featuring quite relaxed circuit specifications.

Inspec keywords: sigma-delta modulation

Other keywords: two-step continuous-time incremental sigma–delta ADC; pipelining two second-order CT IΣΔ ADC; circuit specifications; two-step continuous-time incremental sigma–delta ADC; pipelining two second-order CT IΣΔ ADC; conversion rate

Subjects: A/D and D/A convertors

References

    1. 1)
      • 4. Razavi, B.: ‘Principles of Data Conversion System Design’ (Wiley-IEEE Press, New York, 1995).
    2. 2)
      • 3. Garcia, J., Rodriguez, S., Rusu, A.: ‘On continuous-time incremental sigma–delta ADCs with extended range’, IEEE Trans. Instrum. Meas., 2013, 62, (1), pp. 60–70 (doi: 10.1109/TIM.2012.2212597).
    3. 3)
      • 2. Garcia, J., Rodriguez, S., Rusu, A.: ‘A low-power CT incremental 3rd order sigma–delta ADC for biosensor applications’, IEEE Trans. Circuits Syst. I, 2013, 60, (1), pp. 25–36 (doi: 10.1109/TCSI.2012.2215753).
    4. 4)
      • 1. Markus, J., Silva, J., Temes, G.C.: ‘Theory and applications of incremental ΣΔ converters’, IEEE Trans. Circuits Syst. I, 2004, 51, (4), pp. 678–690 (doi: 10.1109/TCSI.2004.826202).
http://iet.metastore.ingenta.com/content/journals/10.1049/el.2013.1096
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