access icon free Dual-metastability FPGA-based true random number generator

© The Institution of Engineering and Technology
Received 26/11/2012, Published

A novel concept of a true random number generator (TNRG) based on two metastable flip-flops in a FPGA circuit is introduced. Most of metastable based TRNG solutions are based on the assumption of a D-latch (flip-flop) state's uncertainty which is the source of randomness. In the proposed approach direct proximity of the metastable point is not necessary. Difference of the time of response of a pair of nearly metastable flip-flops lies upon the proposed circuit's principle of operation. It can be implemented in common programmable FPGA or CPLD circuits ensuring randomness quality-passing NIST, Diehard and Matlab tests.

Inspec keywords: flip-flops; random number generation; field programmable gate arrays

Other keywords: programmable CPLD circuits; circuit principle; randomness quality-passing NIST; metastable point; TRNG solution; metastable flip-flops; Matlab test; programmable FPGA circuits; dual-metastability FPGA-based true random number generator; Diehard test

Subjects: Digital arithmetic methods; Logic and switching circuits; Logic circuits

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