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Low-cost, CMOS compatible, Ta2O5-based hemi-memristor for neuromorphic circuits

Low-cost, CMOS compatible, Ta2O5-based hemi-memristor for neuromorphic circuits

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In the past, tantalum oxide devices have been used to create non-volatile digital memories, whilst neglecting the analogue memristive characteristics of such devices. In this Letter, it is shown that these devices can provide a low-cost, low-power solution for hemi-memristive devices, when used in their pre-formed, memristive region, whilst being fully CMOS compatible. Furthermore, measurements are presented from the devices that have been fabricated and it is shown that these devices do not require electroforming. Electroforming circuitry takes up valuable chip space at the transistor layers and significantly increases fabrication cost, since voltages as high as 12 V are required, which in turn requires extra masks to form high voltage devices and distribution circuits.

References

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      • Meng, D.: `Thermal failure mechanism and voltammetry metrology for Cu/barrier/low K integration', 2006, Ph.D., The University of Texas at Arlington.
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      • Pérez-Carrasco, J.A., Zamarreño-Ramos, C., Serrano-Gotarredona, T., Linares-Barranco, B.: `On neuromorphic spiking architectures for asynchronous STDP memristive systems', Proc. IEEE Int. Circuits and Systems (ISCAS) Symp., 2010, Paris, France, p. 1659–1662.
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