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Minimum-clock-cycle Itoh-Tsujii algorithm hardware implementation for cryptography applications over GF(2m) fields

Minimum-clock-cycle Itoh-Tsujii algorithm hardware implementation for cryptography applications over GF(2m) fields

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Inversion over finite fields is the most costly basic operation for diverse cryptographic applications, such as elliptic curve cryptography and others. The Itoh-Tsujii algorithm (ITA) provides high performance implementations for the inversion operation in standard bases through diverse versions like squarer-ITA, parallel squarer-ITA or quad-ITA. A new modification of the ITA algorithm allows the inversion over finite fields in a minimal number of clock cycles. The proposed implementations complete the inversion over GF(2233) or GF(2409) from only 10 clock cycles.

References

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      • NIST: ‘Digital Signature Standard (DSS)’, FIPS PUB 186-3.
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    4. 4)
      • Roy, S.S., Rebeiro, C., Mukhopadhyay, D.: `Theoretical modeling of the Itoh-Tsujii inversion algorithm for enhanced performance on k-LUT based FPGAs', Proc. Design, Automation & Test in Europe Conf. & Exhibition (DATE), March 2011, Grenoble, France, 1, p. 1–6.
http://iet.metastore.ingenta.com/content/journals/10.1049/el.2012.1427
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