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Fast and accurate jitter simulation technique for continuous-time ΣΔmodulators

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Abstract

A fast and accurate technique for modelling and simulation of clock jitter in continuous-time sigma-delta (ΣΔ) modulators is introduced. In addition to its high speed compared to the traditional jitter simulation method, the proposed technique is still continuous-time based, which is more convenient than discrete-time based jitter modelling suggested in other publications. The mathematical principle of the proposed technique, as well as simulations results, are presented and compared to other simulation techniques.

References

    1. 1)
      • Oliaei, O., Aboushady, H.: `Jitter effects in continuous-time ΣΔ modulators with delayed return-to-zero feedback', Proc. IEEE ICECS, 1998, Lisbon, Portugal, 1, p. 351–354.
    2. 2)
      • Benabes, P., Kielbasa, R.: `Fast clock-jitter simulation in continuous-time delta-sigma modulators', IEEE Instrumentation Measurement Technology Conf., 2001, Budapest, Hungary, p. 1587–1590.
    3. 3)
      • 1 onward link is available for this reference.
      • CrossRef
    4. 4)
      • J. Cherry , W. Snelgrove . Clock jitter and quantizer metastability in continuous-time delta-sigma modulators. IEEE Trans. Circuits Syst. II, Analog Digit. Signal Process. , 6 , 661 - 676

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content/journals/10.1049/el.2009.2707
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