RT Journal Article

PB iet
T1 Low-power synthesis flow for regular processor design
JN IET Conference Proceedings
SP 12
OP 12
AB The paper presents the development of a low-power synthesis flow for the development of dedicated silicon circuits for data-dominated applications such as DSP systems. The work was carried out as part of a European ESPRIT low power action and a collaborative “low-power” project involving the universities of Liverpool Manchester and Sheffield. The design flow is briefly described and some results are presented for multiplier implementations and their use in the development of a discrete cosine transform (DCT) circuit. (5 pages)
K1 low-power synthesis flow
K1 dedicated silicon circuits
K1 DSP systems
K1 data-dominated applications
K1 multiplier implementations
K1 discrete cosine transform circuit
K1 regular processor design
K1 European ESPRIT low power action
DO https://doi.org/10.1049/ic:20010018
UL https://digital-library.theiet.org/;jsessionid=2hv2ms1ppi28b.x-iet-live-01content/conferences/10.1049/ic_20010018
LA English
SN
YR 2001
OL EN