An FPGA elliptic curve cryptographic accelerator over GF(p)
An FPGA elliptic curve cryptographic accelerator over GF(p)
- Author(s): C. McIvor ; M. McLoone ; J.V. McCanny
- DOI: 10.1049/cp:20040606
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- Author(s): C. McIvor ; M. McLoone ; J.V. McCanny Source: Irish Signals and Systems Conference 2004, 2004 p. 589 – 594
- Conference: Irish Signals and Systems Conference 2004
- DOI: 10.1049/cp:20040606
- ISBN: 0 86341 440 0
- Location: Belfast, Ireland
- Conference date: 30 June-2 July 2004
- Format: PDF
A new FPGA architecture for performing the arithmetic functions needed in elliptic curve cryptographic primitives over GF(p) is presented. The embedded 18×18-bit multipliers and fast carry look-ahead logic located on the Xilinx Virtex2 Pro family of FPGA are used to perform the ordinary multiplications and additions/subtractions required. A 256-bit finite field multiplication, inversion and addition or subtraction can be performed in 0.81 μs, 14.85 μs and 51 ns, respectively. Moreover, a 256-bit elliptic curve scalar point multiplication can be performed in 3.84 ms, using this approach.
Inspec keywords: field programmable gate arrays; carry logic; embedded systems; Galois fields; public key cryptography
Subjects: Logic circuits; Digital arithmetic methods; Cryptography; Logic and switching circuits; Data security
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