In this chapter, the technology of growth of group-IV alloy films and their characterization is discussed. The deposition of heteroepitaxial films in greater depth using various reactors is also examined. Focus is placed on systems that have successfully demonstrated devices. Atmospheric pressure systems are also covered since they have a very great potential of widespread commercial use. As the reactor configurations differ substantially, the advantages and disadvantages of each system are compared. Wafer cleaning methods, reaction kinetics such as constituent incorporation control, dopant control, and selective deposition are examined. Characterization of strained epitaxial films using Rutherford backscattering spectroscopy analysis (RBS), x-ray photoelectron spectroscopy (XPS), spectroscopic ellipsometry (SE), high resolution x-ray diffractometry (HXRD) and atomic force microscopy (AFM) is discussed.

In this chapter, processing issues of gate dielectric on SiGe and other strained layers in Si integrated circuits are addressed. The dielectrics for a surface channel SiGe MOSFET have been incorporated in a number of ways. One may oxidize the alloy or grow a Si cap on the alloy and oxidize it or deposit the dielectric on the alloy. Deposited oxides do not provide adequate quality for device fabrication. The problems examined in this chapter concern formation of ultrathin dielectrics on strained SiGe, strained Si and SiGeC layers. The present status of silicon dioxide formation on SiGe and related films using various techniques such as thermal, rapid thermal, and microwave/ECR plasma-assisted growth is reviewed. Results of studies on the low temperature (150-200 °C) growth of ultrathin oxides using microwave/ECR plasma in O₂ and N₂O/NO ambient, compositional analysis, electrical characterization and interfacial properties of the oxides are presented.

In this chapter, a review of the present status of the fabrication and characterization of Si HFETs in the Si/SiGe and SiGeC material systems is presented. Heterojunction MOSFETs may use a strained SiGe/SiGeC channel or strained Si or strained Ge channel. The substrate for a compressively (tensilely) strained channel would have a lower (larger) lattice constant. The channels may lie on the surface or be buried. The other freedom is to use a vertical channel. The choice of the cap layer for a buried SiGe channel is an important issue having bearing on the performance of the device. A brief discussion of design considerations is given.

In this chapter, an overview of the concept of modulation doping, reported results for SiGe channel p-MODFETs, strained Si nand p-MOSFETs and MODFETs will be presented. Issues related to material growth and the electrical transport properties of both electrons and holes in strained Si have been discussed in Chapters 2 and 3. This chapter will also cover the technology of fabrication of MODFETs and HMOSFETs with strained Si, strained Ge and strained SiGe channels, the performances attained and possible applications. The state-of-the-art proposed HCMOS is also presented in this chapter.

In this chapter, we present an overview of trends and progress made in group-IV heterostructures for optoelectronics. Topics will include devices demonstrated using SiGe, SiGeC (an alloy that can be lattice matched to Si), and direct bandgap, strained heterostructures of GeSn upon SiGe/Si. We shall focus on monolithic optoelectronic integration, a technique that promises low cost, reliable, high performance silicon-based optoelectronic integrated circuits (OEICs). In general, OEICs contain both passive guided-wave components, such as bends, splitters, couplers, and detectors, and active or controlled elements such as laser diodes, routers, switches and modulators.