Switched-Currents: an analogue technique for digital technology
2: Philips Research Laboratories, Redhill, Surrey, UK
This book introduces the basic switched-current technique and presents practical chip examples. Numerous application areas are described, ranging from filters and data converters to image processing applications.
Inspec keywords: switched current circuits; filters; data conversion
Other keywords: switched-current; filters; digital technology; analogue technique; data converter
Subjects: A/D and D/A convertors; Filters and other networks; A/D and D/A convertors; Digital circuit design, modelling and testing; Time varying and switched networks
- Book DOI: 10.1049/PBCS005E
- Chapter DOI: 10.1049/PBCS005E
- ISBN: 9780863412943
- e-ISBN: 9781849193597
- Page count: 618
- Format: PDF
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Front Matter
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1 Introduction
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It has not been the intention of this book to make explicit comparisons throughout with performance achievable with switched-capacitor techniques but rather to identify the state-of-the-art of switched-current techniques. It is acknowledged that besides the general advantages of switched-current techniques allowing the implementation of mixed analogue/digital systems on digital technology, the feasibility of realising switched-current structures as good as current state-of-the-art switched capacitor techniques is still a challenge. However, great strides have already been made to accommodate analogue defects of basic memory cells and in Chapters 11-15 and 22 even greater promise is expressed for future switched-current signal processing.
2 The Evolution of Analogue Sampled-Data Signal Processing
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In this chapter the evolution of analogue sampled-data techniques has been reviewed. The switched-capacitor technique has been seen to dominate in general purpose applications, whilst CCDs are being used extensively in imaging arrays. The emergence of mixed-mode analogue and digital signal processing and the subsequent need to integrate analogue sampled-data circuits on a digital VLSI process was identified. It was then seen that switched capacitors are not fully compatible with digital VLSI technology and that advances in technology will degrade their performance. Finally, the use of switched-current circuits, as a digital process compatible analogue sampled data signal processing technique, has been identified and this forms the basis of this text.
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Basic Cells
3 Switched-Current Architectures and Algorithms
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In this chapter, the scene is set with a very simple review of switched capacitor circuits highlighting the principal differences with a switched current system. The memory cell is described and then used to develop delay lines, integrators and differentiators as filter building blocks. Switched-current filter synthesis is demonstrated with the design of a low pass filter based on cascaded biquadratic sections.
4 Switched-Current Limitations and Non-Ideal Behaviour
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This chapter describes the non-ideal behaviour of switched-current circuits resulting from imperfect MOS transistor operation. Just as with the switched-capacitor technique, MOS transistor imperfections result in deviations from the ideal performance described by the algorithmic properties of its signal processing modules (see Chapter 3). The chapter is divided into five parts according to the type of MOS transistor imperfection: Section 4.2 analyses the effects of transistor gain and threshold voltage mismatch, Section 4.3, the effects of transistor drain conductance, Section 4.4, the effects of transistor bandwidth, Section 4.5, the effects of switch charge injection and Section 4.6, the effects of noise. In each case, the analysis derives the resulting errors in the frequency response of the switched-current delay cell and integrator. Circuit techniques for controlling these non-ideal effects and enhancing performance are discussed in Chapter 6.
5 Noise in Switched-Current Circuits
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This chapter will examine the effects of electrical noise on a switched current circuit. Here electrical noise means the small fluctuations of current in an MOS transistor and is inherent to the operation of the device. Often the term electrical noise is used to describe any unwanted signal, including power supply disturbances and parasitic coupling of extraneous digital signals into the analogue signal path. While disturbances by these unwanted signals may also corrupt the operation of a switched-current circuit, they can be greatly reduced and practically eliminated by the use of careful layout techniques and by using balanced circuits.
6 Switched-Current Circuit Design Techniques
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This chapter builds on earlier chapters (Chapters 3 and 4) which described architectures and non-idealities of basic switched-current circuits. In Chapter 3, basic cells were developed (delay, integrator and differentiator modules) and their algorithmic behaviour was described in terms of finite difference equations. In Chapter 4, the effects on circuit performance of imperfections in the MOS transistors used to build the circuits were analysed. In this chapter, circuit techniques are described which enhance performance in terms of precision, dynamic range and linearity.
7 Class AB Switched-Current Techniques
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In this chapter, a class AB switched-current technique was proposed to enable switched-current filters with considerably reduced quiescent power consumption to be built. A family of filter building blocks derived from the basic cell was then developed and the principle performance limitations of the technique briefly discussed. Early simulated results for a biquadratic filter showed that charge injection causes significant errors in filter structures and techniques to cancel these errors are currently being investigated.
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Filters
8 Switched-Current Filters
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In this chapter, the design of switched-current filters, employing the CMOS building blocks and circuits developed in previous chapters, is considered and the results of two integrated test filters presented. The chapter starts by considering the synthesis of switched-current filters based on biquadratic sections. Sections based on either integrators or differentiators are described and measured results from an integrated integrator based lowpass section are presented to demonstrate the technique. For the realisation of high-order or high-g filters, the ladder approach is very popular because of its low sensitivity properties. This approach is described, with the aid of an illustrative integrated bilinear fifth order elliptic lowpass filter example, which demonstrates the practical application of the technique. The next three filter synthesis approaches; FIR filters, wave active filters and the transposition of switched-capacitor designs, are only briefly discussed as detailed descriptions can be found in Chapter 10, 11 and 9, respectively. Finally, this chapter proposes a new approach to the realisation of tunable filters on pure digital processes. The proposed switched-transconductance (ST) technique takes advantage of the fact that in many applications switched current circuits need a voltage interface, and hence also a linear transconductor; by incorporating this transconductor with the switched current circuits tunable impedances with good inherent accuracy can be realised.
9 A Switched-Capacitor to Switched-Current Conversion Method
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This chapter presents a general method for synthesising SI filter circuits using techniques already developed for synthesising SC filter circuits. The method consists of transposing the SFG of a SC filter circuit and realising the single-input multiple-output integrators in the resulting SFG with SI integrators. The resulting SI circuits realise the same transfer function as the SC filter circuit and, in addition, possess identical component sensitivities. As was demonstrated, all types of filter functions are realisable by this method, both all-pole filter functions and those containing finite transmission zeros.
10 Switched-Current Video Signal Processing
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The switched-current (SI) technique is ideally suited to mixed analogue/digital IC's implemented in standard digital VLSI CMOS processing. This chapter builds on previous chapters, developing the technique to enable engineering of video frequency signal processors.
11 Switched-Current Wave Analogue Filters
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In this chapter, a new approach for the realisation of switched-current filters has been presented. The simplicity and reliability of the new approach makes it a powerful alternative to other reported realisations based on SI integrators, offering additional advantages such as modularity, easy programmability and simple building blocks, whose performance characteristics are independent of the particular filter. Like other SI filter realisations, the proposed method has to be improved to further reduce the effect of mismatch and feedthrough errors.
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Data Converters
12 Algorithmic and Pipelined A/D Converters
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In this chapter, the implementation of Nyquist sampling switched current ADCs is discussed. Since the architecture determines both the converter's performance and the type of subcircuits needed to implement it, the various ADC architectures that have been used to implement switched-current ADCs will first be considered. Then, the necessary switched-current building blocks and their practical implementations will be discussed in the context of the ADC's requirements. Finally, the performance of some switched-current ADCs will be reviewed and their major limitations considered.
13 High Resolution Algorithmic A/D Converters based on Dynamic Current Memories
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This work shows that the effective gate voltage of the memorising transistor is a key performance factor of a dynamic current memory to be used in an algorithmic A/D converter. Increasing this voltage reduces both the time*error product and the sampled noise of the memory. It is an intuitive result since the value actually memorised is this voltage. Therefore, the memory's performance will be dramatically reduced in low voltage applications.
14 Building Blocks for Switched-Current Sigma-Delta Converters
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This chapter presented the design and implementation of several different building blocks for switched-current double-integrator sigma-delta modulators (DISDMs). Together with a description of these building blocks, a systematic design procedure was given for selecting the dimensions of the key components of each DISDM design such that the implementation meets the desired speed and resolutions requirements. Moreover, with such a concise design procedure, the component of each DISDM can be further selected so that the area and power requirements are minimised. Although this work is still somewhat immature, one DISDM design was successfully fabricated in a 1.2μm CMOS process requiring an area of 0.5mm2 and had an average power consumption of 2.5mW. The measured peak SNR was 56dB, equivalent to about 9-bits of linear resolution.
15 Continuous Calibration D/A Conversion
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In this chapter, the demands on the linearity of high-resolution D/A and A/D converters for measurement and digital audio equipment are currently so high that the achievable accuracy based on the matching of components in a standard process is not sufficient. Therefore, additional calibration techniques are used to achieve high resolution. A disadvantage of many calibration techniques is the need for a special calibration period. During this period, the converter cannot be used for conversion, which particularly limits the application range. Furthermore, a relatively large amount of chip area is needed to store the error signals. Other calibration techniques, such as laser trimming and external adjustment, take precious time and facilities and are sensitive to ageing and temperature, whilst dynamic element matching needs external components. In this chapter, the switched-current technique is used as a self calibration technique. Its use enables the design of D/A converters that need no calibration period, additional trimming or external components, and are insensitive to process variations.
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Other Applications
16 Dynamic Current Mirrors
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Based on a simple idea, the dynamic current mirror (or current copier) eliminates the main limitations of standard current mirrors, that are due to offset and 1/f noise. A new problem is created by the charge injected from the switches but the resulting error can be kept very low by adequate design procedures, especially when speed is not a limitation. Except in very special cases, the cascode configuration (or equivalent means) is needed to avoid spoiling the excellent intrinsic precision by errors due to the nonzero output conductance and to the gate-to-drain capacitance. The basic cell, which provides a single one-to-one discontinuous copy of the input current, can be extended to obtain continuous multiple copies as well as current multiplication or division by integer numbers. The principle of dynamic mirrors can probably be extended to a variety of different circuits, to create very precise analogue CMOS building blocks.
17 Switched-Current Cellular Neural Networks for Image Processing
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In this chapter, we see that the combination of switched-current techniques and cellular neural networks allows simple design of robust and fast analogue massive processing ICs for image processing tasks. Although the techniques discussed in the chapter are mainly oriented to binary output images, the use of the soft-non-linearity in transient mode of operation produces non-binary output images as well. Also, the computational capabilities of these massive processing switched-current chips can be significantly enhanced by incorporating the newest CNN model improvements: (a) Time-variant and non-linear templates, (b) Multi layer DTCNNs, (c) Multipath systems. Just to mention a few, this would allow applications such as radon transform, halftoning, automatic vehicle guidance, skeletonisation and motion detection and estimation.
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Analysis, Simulation and Test
18 Test for Switched-Current Circuits
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The material presented here shows that there exists the possibility of testing much of th basic transistor circuitry of switched current devices by simple reconfiguration. The technique offers the advantage of in-circuit test signature generation with no special test equipment needed for go/no go testing. One cascade of cells is tested against a second on the same device. This reduces errors due to process variation and also means that special test generation for new devices is no longer required in test mode all devices essentially look the same.
19 Analysis of Switched-Current Filters
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The small-signal AC analysis of ideal switched-current filters, at transistor level, can be done in a similar way to those used for ideal switched capacitor filters. In switched-current filters, the algorithm described can model precisely the effects of drain resistances of MOS transistors and other resistive losses, and also the effects of parasitic capacitors, such as Cgd capacitances. The interpolation of z-transforms by applying the FFT is not only a fast way to obtain frequency responses; a great deal of information can is also available from the interpolated transforms, their poles and zeros, and time-domain responses. Methods for computing sensitivities in relation to all the element values in a simple way were presented, directly derived from the methods used for continuous-time circuits. The algorithm described is not able to evaluate non-linear effects, and cannot model precisely (although some effects can be approximated by proper linearised models) effects caused by incomplete circuit stabilisation during a switching interval. It is, however, a powerful tool for the evaluation and verification of structures intended for switched-current or switched capacitor filters.
20 Non-linear Behaviour of Switched-Current Memory Circuits
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The non-linear behaviour of the SI memory circuit has been described in this chapter. This, in turn, was used to identify the major source of distortion in these circuits. Specifically, it was shown that distortion in SI circuits is the result of variations in the settling behaviour of the current memory cell from one sampling instant to the next. These variations are a direct result of the operating point of the current memory cell being a function of the time-varying input current signal. As a means of quantifying the amount of distortion generated by a current memory circuit under specific input conditions, an upper bound on the THD was developed. Several examples demonstrated the simplicity of using the formula for the THD bound. Moreover, the bound in each example was checked against the THD computed from a HSPICE simulation and, in one particular case, compared to some experimentally observed results. For all these cases, the actual THD measure was within the proposed bound confirming our theoretical predictions. We conclude that SI circuits will operate with the least amount of distortion when the sampling (or clock) rate is made much larger than the frequency of the input signal. This is also true for its linear behaviour (i.e. magnitude and phase errors) and suggests that for best performance, a highly oversampled situation should be used. Finally, it should be noted here that the THD bound and its development are valid for all sampled-data systems, regardless of its circuit implementation.
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Future Directions
21 GaAs MESFET Switched-Current Circuits
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The implementation of the switched-current technique using GaAs MESFET technology has been proposed in this chapter, however, further circuit design innovation is still required before the technique can be practically exploited. We believe that the work is an encouraging step towards LSI in GaAs design, specifically for realising the analogue parts such as modulators, integrators, filters, and comparators for mixed mode RF front-end interfaces on pure digital technology.
22 Switched-Currents: State-of-the-Art and Future Directions
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This book has demonstrated that the future of switched-currents is very 'dynamic'! This list of possible future research avenues has shown that there is considerable scope for the development of the switched-current technique in forthcoming years.
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Back Matter
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