This chapter describes LSI Logic's analogue BiCMOS technology and attempts to highlight the importance of modelling and simulation at all stages of chip manufacture and development in particular, process and device modelling are discussed as ways to improve the overall manufacturing process of a designed circuit. At its lowest level this means modelling the manufacturing steps to enable a more stable process to be developed and manufactured, whilst at its highest level it means statistically modelling the single transistor performance to enable the reliable prediction of circuit performance.

Switched capacitor filters have now been around for a decade and many powerful and sophisticated design techniques have been developed. In view of the excellent literature on this subject to which the reader may refer, the present chapter has the rather specific aim of presenting some advances developed by the authors which have made a contribution towards extending the limits for switched capacitor filters beyond the generally accepted performance boundaries shown in Figure 4.1. The areas of performance improvement considered include performance precision, maximum achievable Q-factor and maximum operating frequency.

In this chapter, after an initial discussion of the basic static and dynamic parameters which characterise data converters, conventional conversion approaches and specific techniques used in CMOS technology are described. Non-conventional and more advanced solutions are considered in two successive chapters.

This chapter described a number of data conversion circuit techniques, both for A/D and D/A, which can be employed in a wide variety of system applications which may need conversion speeds up to the order of several hundreds of kHz, or even few MHz, and conversion resolutions ranging from 8-bit to 16-bit. Firstly, we presented one of the most popular architectures for realising A/D converters with conversion resolution from 10-bits to 16-bits and conversion speeds between the audio and the video frequency bands and which is based on the well known combination of the successive approximation algorithm together with self-calibrating techniques. Then, we described a low-cost quasi-passive D/A converter yielding up to 8-bit resolution and conversion speeds up to a few MHz, and a capacitance-ratio-independent D/A converter which can achieve high conversion resolutions using operational amplifiers with relatively modest values of the DC gain. Both types of converters can be easily programmed by digital means to achieve different conversion characteristics, both for speed and resolution. Finally, we considered an algorithmic D/A converter with a built-in filtering function to shape the resulting output analogue signals, as required in a complete mixed-signal digital-to-analogue interface system. Various examples of a CMOS integrated circuit implementation were also presented to illustrate the circuit design techniques described for the self-calibrated and algorithmic converters.

This chapter has presented methods to improve element matching for MOS integrated circuits. A high degree of matching is required if a good yield is to be guaranteed in production. Methods to reduce the coupling of noise from the substrate and power supplies have also been presented. Hopefully the reader has been made aware of some of the practical aspects of mixed analogue and digital design. He should now be motivated to consider such problems for himself.

This chapter has outlined the incorporation of both analogue and digital circuits in a single chip to meet stringent technical and economic requirements of a video communications application. Such a hybrid approach is becoming very important for many applications in the telecommunications area, such as modems, radio-telephones and ISDN equipment in general. To obtain the maximum benefit from this approach, analogue and digital parts can not be synthesised and analysed separately but a unified approach will be found to be the best. This will result in the development of many specific mixed mode techniques in the future.

In this chapter, the principles on which mixed-mode circuit-level/logic-level simulation is based have been described. The principal areas of new development concern the interfaces between circuit-level and logic devices, in particular, the mapping of signals across those interfaces and the loads reflected onto analogue nodes by logic devices. The feasibility of mixed-mode simulation has been demonstrated by example and questions of precision and cost of simulation addressed.

This chapter has described an advanced computer assisted design environment which employs high-level symbolic tools capable of analysing and supporting the synthesis of system architectures defined in terms of specific functional building blocks as well as the architectures of such functional building blocks defined in terms of circuit components. It has presented the general organization of a design environment, including a brief discussion of the strategy for multi-level communication and flow of information which was adopted in order to efficiently integrate such tools and thus provide high flexibility for designing mixed analogue-digital ASICs. We have also introduced the concept of synthesisers which employ a coherent, common framework for the synthesis and analysis of networks implementing different functions, each of which can also be realised using multiple topologies. Essential to such multi-function multi-topology synthesisers is the capability of automatically generating symbolic transfer functions from a given circuit description, and which was also addressed for the case of z-domain transfer functions generated from SFG's representing the operation of SC networks. Finally, we presented a knowledge-based system for designing at the architecture level SC filters based on multiple methodologies, and gave a detailed example corresponding to the methodology based on the cascade of SC biquads.

CAD tools for analogue (and mixed analogue-digital) circuits are receiving a great deal of attention from both research institutes and companies. Among these tools, a strong commitment is made towards developing practical silicon compilers that can be embedded into existing commercial frameworks. Present compilers are restricted from the viewpoints of design style, architecture and application, although there is an emerging generation which fits better into the structure of software environments.