We have in this chapter presented the main ideas that have been proposed in the literature for the tuning of integrated continuous-time filters. To minimise interference problems, master-slave schemes are used most often. Although first-order master stages have been employed, typically, second-order filters or oscillators are used because they can be matched more reliably to second-order slave filter stages. Even for that case, matching of much better than 1 percent between master and slaves on a chip is difficult to maintain. This problem increases at higher frequencies when parasitic components become more important. Whether the master-slave technique or a direct tuning method is used in cases where the filter has periodic inactive periods, it is helpful for better matching and tracking that a filter architecture is chosen that has many identical circuit blocks. The tuning algorithm will be simpler and the control circuitry smaller, less noisy and less power-hungry DFT is a well understood and accepted requirement in integrated circuits, i.e. an IC is 'designed for test'. Analogously, it is crucial for success that an integrated analogue filter is 'designed for tuning'. The filter topologies must be tunable, must be insensitive to parasitics, and be constructed with well matched circuit blocks. The unavoidable overhead penalty for tuning will then be minimised.
On-chip automatic tuning of filters, Page 1 of 2
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