Gate Dielectrics on Strained Layers
In this chapter, processing issues of gate dielectric on SiGe and other strained layers in Si integrated circuits are addressed. The dielectrics for a surface channel SiGe MOSFET have been incorporated in a number of ways. One may oxidize the alloy or grow a Si cap on the alloy and oxidize it or deposit the dielectric on the alloy. Deposited oxides do not provide adequate quality for device fabrication. The problems examined in this chapter concern formation of ultrathin dielectrics on strained SiGe, strained Si and SiGeC layers. The present status of silicon dioxide formation on SiGe and related films using various techniques such as thermal, rapid thermal, and microwave/ECR plasma-assisted growth is reviewed. Results of studies on the low temperature (150-200 °C) growth of ultrathin oxides using microwave/ECR plasma in O2 and N2O/NO ambient, compositional analysis, electrical characterization and interfacial properties of the oxides are presented.
Gate Dielectrics on Strained Layers, Page 1 of 2
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