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Radiation effects on ICs and a mixed analog CMOS-NPN-PJFET-on-insulator technology

Radiation effects on ICs and a mixed analog CMOS-NPN-PJFET-on-insulator technology

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The goal of this chapter is to provide insight into the radiation effects involved in space and high energy physics environments. These environments can cause significant damage to spacecraft or detector electronics. They can cause degradation through total-dose ionising radiation damage, single event related soft and hard errors, and displacement damage. Sensitivity and performance of commercial technologies have been discussed with respect to Silicon-On-Insulator (SOI) for these radiative environments. Description and results of an SOI technology called DMILL have been also reported. DMILL technology is expected to fulfil the constraints of high energy physics electronics and could be of interest in other fields, such as space, military, and nuclear power applications, where radiation tolerant integrated circuits are required. Other potentialities for this SOI technology are its use in communication applications due to its high transistor performance, or in micromachining for sensor readout on the same chip. Therefore, we think that both device and circuit designers will find this an interesting development area, and a good example of process-device-design interaction for the manufacturability of microsystems.

Inspec keywords: silicon-on-insulator; junction gate field effect transistors; radiation effects; CMOS integrated circuits

Other keywords: process-device-design interaction; microsystem manufacturability; spacecraft; silicon-on-insulator; total-dose ionising radiation damage; sensor readout micromachining; high energy physic electronics; mixed analog CMOS-NPN-PJFET-on-insulator technology; DMILL technology; radiation tolerant integrated circuits; detector electronics; SOI technology; IC radiation effects; nuclear power

Subjects: CMOS integrated circuits

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