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Use of fault augmented functions for automatic test pattern generation

Use of fault augmented functions for automatic test pattern generation

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Techniques for the automatic generation of test patterns for digital circuits may be classified into four main areas; 1) random pattern generation... random input sequences which may be exhaustive, pseudo-exhaustive or used in conjunction with fault simulation tools to assess fault coverage. 2) heuristics ... these include checkerboard patterns and walking ones and zeros as well as functional tests; for automatic generation of such sequences there is the implication of some kind of expert system and the need for simulation to assess fault coverage. 3) path sensitisation... this encompasses the many variations on the D-algorithm and is probably the most widely used algorithmic technique. 4) algebraic techniques. It is with the last that this chapter is concerned.

Inspec keywords: automatic test pattern generation; logic circuits; logic testing; algebra

Other keywords: fault augmented function; automatic test pattern generation; logic circuit; digital circuit; algebraic technique

Subjects: Digital circuit design, modelling and testing

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