Circuit level/gate level mixed-mode simulation

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Circuit level/gate level mixed-mode simulation

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Author(s): K. G. Nichols 1 ; A. D. Brown 1 ; P. F. Kilty 2
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Source: Analogue-digital ASICs: circuit techniques, design tools and applications,1991
Publication date January 1991

In this chapter, the principles on which mixed-mode circuit-level/logic-level simulation is based have been described. The principal areas of new development concern the interfaces between circuit-level and logic devices, in particular, the mapping of signals across those interfaces and the loads reflected onto analogue nodes by logic devices. The feasibility of mixed-mode simulation has been demonstrated by example and questions of precision and cost of simulation addressed.

Inspec keywords: mixed analogue-digital integrated circuits; logic circuits; circuit simulation

Other keywords: logic device; signal processing system; signal mapping; mixed-mode circuit-level-logic-level simulation

Subjects: Logic circuits

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