Inspec keywords: adders; field programmable gate arrays

Other keywords: size 65 nm; parallel single-precision additions; double-precision adder architecture; energy efficient single-precision; fully pipelined architecture; Xilinx Virtex-5 devices; logic resources; STM technology ASIC platform; intellectual property; double-precision merged floating-point adder; dual single-precision operations; Altera Arria-10 devices; size 90 nm; Altera Stratix-III devices; IP core adder; FPGA devices; Xilinx Virtex-7 devices; two-path FP addition algorithm; clock cycles; high performance single-precision; resource sharing

Subjects: Logic and switching circuits; Logic circuits